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| Click here for this datasheet translated into Chinese! FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD October 2009 FSA2268 / FSA2268T Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Features 0.4 Typical On Resistance (RON) for +3.0V Supply 0.25 Maximum RON Flatness for +3.0V Supply -3db Bandwidth: > 50MHz Low ICCT Current Over an Expanded Control Input Range Packaged in Pb-free 10-Lead MLP (1.4 x 1.8mm) Power-Off Protection on Common Ports Broad VCC Operating Range: 1.65 to 4.3V HBM JEDEC: JESD22-A114 - I/O to GND: 13.5kV - Power to GND: 16.0kV Noise Immunity Termination Resistors in FSA2268T Description The FSA2268 is a high-performance, dual Single Pole Double Throw (SPDT) analog switch that features ultralow RON of 0.4 (typical) at 3.0V VCC. The FSA2268 operates over a wide VCC range of 1.65V to 4.3V and is designed for break-before-make operation. The select input is TTL-level compatible. The FSA2268 features very low quiescent current even when the control voltage is lower than the VCC supply. This feature suits mobile handset applications by allowing direct interface with baseband processor general-purpose I/Os with minimal battery consumption. The FSA2268T includes termination resistors that improve noise immunity during overshoot excursions, off-isolation coupling, or "pop-minimization." Applications Cell Phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-Top Box IMPORTANT NOTE: For additional information, analogswitch@fairchildsemi.com. please contact Ordering Information Part Number FSA2268UMX FSA2268TUMX FSA2268L10X Top Mark GF GH GH Eco Status Green Green Green Package Description 10-Lead, Quad Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm, 0.4mm pitch 10-Lead, Quad Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm, 0.4mm pitch 10-Lead, MicroPakTM, 1.6mm Wide For Fairchild's definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Analog Symbols 1B0 1B1 1A S1 1B0 1B1 2B0 2B1 2A S2 1A S1 GND 2B0 2B1 2A S2 GND Figure 1. FSA2268 Figure 2. FSA2268T (with Noise Termination Resistors) www.fairchildsemi.com (c) 2007 Fairchild Semiconductor Corporation FSA2268/2268T Rev. 1.0.9 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Pin Configuration Vcc 2B0 1B1 2B1 GND 2A 3 4 5 6 7 2 1 10 1B0 9 8 VCC 1A 10 1B0 1B1 2B0 2B1 1 2 3 4 5 GND 9 8 7 6 1A S1 S2 2A S2 S1 Figure 3. Pin Assignment 10-Pin UMLP (Top-Through View) Figure 4. 10-Lead MicroPakTM Pin Descriptions Pin # UMLP 1 2 3 4 5 6 7 8 9 10 Pin # MicroPakTM 2 3 4 5 6 7 8 9 10 1 Name 1B1 2B0 2B1 GND 2A S2 S1 1A VCC 1B0 Description Data Ports Data Ports Data Ports Ground Data Ports Switch Select Pins Switch Select Pins Data Ports Supply Voltage Data Ports Truth Table Control Input, Sn LOW Logic Level HIGH Logic Level Function nB0 connected to nA (FSA2268/2268T); nB1 terminated to GND (FSA2268T only) nB1 connected to nA (FSA2268/2268T); nB0 terminated to GND (FSA2268T only) (c) 2007 Fairchild Semiconductor Corporation FSA2268/2268T Rev. 1.0.9 www.fairchildsemi.com 2 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VSW VIN IIK ISW ISWPEAK TSTG TJ TL MSL Parameter Supply Voltage Switch I/O Voltage (1) Min. -0.5 1B0, 1B1, 2B0, 2B1, 1A, 2A Pins T Version nBn Pin Off (1) Max. 5.5 VCC + 0.3 1.4 5.5 -50 350 500 Units V V V mA mA mA C C C Level kV -0.5 0 -0.5 Control Input Voltage S1, S2 Input Clamp Diode Current Switch I/O Current (Continuous) Peak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle) Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 10 seconds) Moisture Sensitivity Level (JEDEC J-STD-020A) I/O to GND Human Body Model, JEDEC: JESD22-A114 Power to GND All Other Pins -65 +150 +150 +260 1 13.5 16.0 9.0 2.0 ESD Charged Device Model, JEDEC: JESD22-C101 kV Note: 1. Input and output negative ratings may be exceeded if input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VIN VSW TA Supply Voltage Control Input Voltage Switch I/O Voltage Operating Temperature Parameter Min. 1.65 0 0 -40 Max. 4.30 VCC VCC +85 Units V V V C (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 3 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD DC Electrical Characteristics All typical values are at 25C unless otherwise specified. Symbol Parameter Conditions VCC (V) Min. VIH Input Voltage High 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 3.6 to 4.3 VIL Input Voltage Low 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 VIN=0 to VCC nA=0.3V, VCC-0.3V nB0 or nB1=VCC-0.3V, 0.3V, or Floating Figure 6 nA=0.3V, nB0 or nB1=0V or Floating Figure 6 nA=0.3V, VCC-0.3V nB0 or nB1=VCC-0.3V, 0.3V, or Floating Figure 7 Common Port (1A, 2A), VIN=0V to 4.3V, VCC=0V nB0, nB1=Floating Common Port (1A, 2A), VIN=0V to 4.3V, VCC=0V nB0, nB1=0V or Floating ION=100mA, nB0 or nB1=0.7V, 3.6V Figure 5 ION=100mA, nB0 or nB1=0.7V, 2.3V Figure 5 RON Switch On Resistance(2)(5) ION=100mA, nB0 or nB1=0V, 0.7V, 1.6V, 2.3V Figure 5 ION=100mA, nB0 or nB1=0V, 0.7V, 1.65V Figure 5 On Resistance Matching Between Channels(3)(5) ION=100mA, nB0 or nB1=0.7V 1.65 to 4.30 -0.5 TA=+25C TA=-40 to +85C Unit Typ. Max. Min. 1.7 1.5 1.4 0.9 Max. V 0.7 0.5 0.4 0.4 0.5 V V A IIN INO(0FF), INC(OFF) FSA2268 INC(OFF) FSA2268T Control Input Leakage (S1,S2) Off Leakage Current of Port nB0 and nB1 Off Leakage Current of Port nB0 and nB1 (with Termination Resistors) On Leakage Current of Port nA Power-Off Leakage Current (Common Port Only 1A, 2A) Power-Off Leakage Current (Common Port Only 1A, 2A) 1.95 to 4.30 -10 10 -50 50 nA 1.95 to 4.30 -10 10 -50 50 A IA(ON) 1.95 to 4.30 -20 20 -100 100 nA IOFF FSA2268 IOFF FSA2268T 0V 1 A 0V 40 A 4.30 0.30 0.50 3.00 0.40 0.55 2.30 0.52 1.65 4.30 3.00 2.30 1.65 1.00 0.04 0.06 0.12 1.00 0.13 0.13 RON Continued on following page... (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 4 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD DC Electrical Characteristics (Continued) All typical values are at 25C unless otherwise specified. TA=+25C Symbol Parameter Conditions VCC (V) Min. On Resistance Flatness(4)(5) IOUT=100mA, nB0 or nB1=0V to VCC 4.30 3.00 2.30 1.65 TA=-40 to +85C Max. Min. Max. 0.25 0.25 Unit Typ. RFLAT(ON) 0.5 0.6 200 RTERM ICC ICCT Internal Termination Resistors(6) Quiescent Supply Current Increase in ICC per Input VIN=0 or VCC, IOUT=0 Input at 2.6V Input at 1.8V 4.30 4.30 -100 100 -500 500 7 15 nA A 3 7 Notes: 2. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 3. RON=RON max - RON min measured at identical VCC, temperature, and voltage. 4. Flatness is defined as the difference between the maximum and minimum value of on resistance (RON) over the specified range of conditions. 5. Guaranteed by characterization, not production tested, for VCC=1.65-3.00V. 6. Guaranteed by characterization, not production tested. (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 5 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD AC Electrical Characteristics All typical value are for VCC=3.3V at 25C unless otherwise specified. Symbol Parameter Conditions VCC (V) 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 1.65 to 4.30 TA=+25C TA=-40 to +85C Max. 60 65 70 35 40 45 Unit Figure Min. Typ. Max. Min. Turn-On Time nB0 or nB1=1.5V, RL=50, CL=35pF nB0 or nB1=1.5V, RL=50, CL=35pF 55 60 65 70 30 35 40 40 15 15 15 16 25 -70 -70 >50 .06 5 5 5 2 2 2 2 15 15 15 tON ns Figure 8 Figure 9 ns tOFF Turn-Off Time tBBM nB0 or BreaknB1=1.5V, Before-Make RL=50, Time CL=35pF Charge Injection Off Isolation Crosstalk -3db Bandwidth Total Harmonic Distortion CL=1.0nF, VS=0V, RS=0 ns Figure 10 Q OIRR Xtalk BW THD pC dB dB MHz % Figure 14 Figure 12 Figure 13 Figure 11 Figure 17 f=100kHz, 1.65 to 4.30 RL=50, CL=0pF f=100kHz, 1.65 to 4.30 RL=50, CL=0pF RL=50, CL=0pF 1.65 to 4.30 f=20Hz to 20kHz, 1.65 to 4.30 RL=32, VIN=2Vpp Capacitance Symbol CIN COFF CON Parameter Control Pin Input Capacitance B Port Off Capacitance A Port On Capacitance Conditions f=1MHz f=1MHz f=1MHz VCC (V) 0 3.3 3.3 TA=+25C Min. Typ. Max. 1.5 30 120 Unit pF pF pF Figure Figure 15 Figure 15 Figure 16 (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 6 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Test Diagrams VON NC nBn V IN GND I A(OFF) A nA V IN Select V Sel = I ON GND Select VSel = GND 0 orVcc R ON = VON / ION Figure 5. 0 or Vcc **Each switch port is tested separately. On Resistance Figure 6. Off Leakage (Ports tested separately) NC I A(ON) nBn V IN nA A V IN Select VSel = GND GND RS CL GND RL V OUT 0 or Vcc V Sel GND Figure 7. On Leakage Figure 8. Test Circuit Load tRISE = 2.5ns VCC Input - VSel GND VOH Output - VOUT VOL 10% 90% VCC /2 90% VCC /2 tFALL = 2.5ns 10% 90% 90% tON tOFF Figure 9. Turn-On / Turn-Off Waveforms (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 7 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Test Diagrams (Continued) tRISE = 2.5ns nB n V IN GND nA V cc V IN GND CL GND V OUT RL Input - VSel 0V V OUT 0.9*Vout 10% 90% V cc/2 RS 0.9*Vout V Sel GND RL and CL are functions of the application environment (50, 75, or 100 ). CL includes test fixture and stray capacitance. tD Figure 10. Break-Before-Make Interval Timing Network Analyzer RS GND V IN V S GND VSel GND GND VOUT RT GND RL and CL are functions of the application environment (50, 75, or 100 ). L CL includes test fixture and stray capacitance. Figure 11. Bandwidth Network Analyzer RS GND RT VSel GND GND VS GND VOUT GND RT GND RS and RT are functions of the application environment (50, 75, or 100 ). Off-Isolation = 20 Log (VOUT / VIN ) - Figure 12. Channel Off Isolation (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 8 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Test Diagrams (Continued) Network Analyzer RS VIN VS GND GND VSel GND GND RT GND RT GND V OUT RS and RT are functions of the application CROSSTALK = 20 Log (VOUT / VIN ) environment (50, 75, or 100 ). Figure 13. Adjacent Channel Crosstalk Generator B VS RS GND nSn VSEL GND VIN mA CL GND VOUT VCC Input - VSEL 0V VOUT VOUT Off On Off CL includes test fixture and stray capacitance Q = VOUT / CL Figure 14. Charge Injection Test nBn Capacitance Meter f = 1MHz nBn nSn VSel = Capacitance Meter nBn nSn V Sel = nBn 0 or Vcc f = 1MHz 0 orVcc Figure 15. Channel Off Capacitance Figure 16. Channel On Capacitance Audio Analyzer RS GND V IN VS GND V CNTRL GND GND V OUT RT GND VSel = 0 or Vcc RS and RT are functions of the application environment (see AC Tables for specific values). Figure 17. (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 Total Harmonic Distortion www.fairchildsemi.com 9 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Physical Dimensions 0.15 C 2X 1.40 A B 0.663 1.700 0.563 9X 1 PIN #1 QUADRANT 1.80 0.400 0.15 C 2.100 2X TOP VIEW 0.55 MAX. 0.10 C 0.152 SEATING PLANE 0.225 10X RECOMMENDED LAND PATTERN 1.450 0.550 9X 0.450 0.08 C 0.050 C SIDE VIEW 0.400 1.850 0.225 3 6 1 10X OPTIONAL MINIMIAL TOE LAND PATTERN 0.40 9X 0.35 0.45 0.45 0.55 10 0.15 10X 0.25 0.10 C A B 0.05 C 0.100 0.500 0.100 BOTTOM VIEW 0.100 DETAIL A PIN #1 TERMINAL SCALE: 2X A. DIMENSIONS ARE IN MILLIMETERS. B. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C. DRAWING FILENAME: UMLP10Arev2 Figure 18. 10-Lead Quad Ultrathin Molded Leadless Package (UMLP) Note: click here for tape and reel specifications, available at: http://www.fairchildsemi.com/products/analog/pdf/UMLP10_TNR.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 10 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD Physical Dimensions (Continued) 0.10 C 2X 2.10 A B (0.11) 0.56 1.62 KEEPOUT ZONE, NO TRACES OR VIAS ALLOWED 1.60 PIN1 IDENT IS 2X LONGER THAN OTHER LINES 0.10 C 1.12 TOP VIEW 2X 0.50 (0.35) 10X (0.25) 10X RECOMMENDED LAND PATTERN 0.55 MAX 0.05 C 0.05 C C 0.05 0.00 (0.20) 0.35 0.25 (0.15) 0.35 0.25 SIDE VIEW D 0.65 0.55 1 4 DETAIL A 0.35 0.25 (0.36) 0.56 5 DETAIL A 2X SCALE NOTES: A. PACKAGE CONFORMS TO JEDEC REGISTRATION MO-255, VARIATION UABD . B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. PRESENCE OF CENTER PAD IS PACKAGE SUPPLIER DEPENDENT. IF PRESENT IT IS NOT INTENDED TO BE SOLDERED AND HAS A BLACK OXIDE FINISH. E. DRAWING FILENAME: MKT-MAC10Arev5. 10 (0.29) 0.50 9 6 0.25 9X 0.15 1.62 0.35 9X 0.25 0.10 0.05 CAB C ALL FEATURES BOTTOM VIEW Figure 19. 10-Lead, MicroPakTM, 1.6mm Wide Note: click here for tape and reel specifications, available at: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 11 FSA2268 / FSA2268T -- Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD (c) 2007 Fairchild Semiconductor Corporation FSA2268/FSA2268T Rev. 1.0.9 www.fairchildsemi.com 12 |
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